1. Field of the Invention
The present invention relates to a semiconductor device comprising a high-withstand voltage MOSFET and its manufacturing method and more particularly, to a semiconductor device comprising both high-withstand voltage MOSFET and low-withstand voltage MOSFET and its manufacturing method.
2. Description of the Related Art
The high-withstand voltage MOSFET is very large in size as compared with the low-withstand voltage MOSFET because it is necessary to have a long gate length to ensure a punch through withstand voltage and a low-concentration diffusion region as a drift region. Especially, a lateral type high-withstand voltage MOSFET in which source and drain regions are arranged in a lateral direction along a semiconductor substrate surface is very large in size.
Conventionally, various kinds of techniques for reducing the size of such large lateral type high-withstand voltage MOSFET have been proposed. As one of the above technique for reducing the size, Japanese Unexamined Patent Publication No. 06-151453 discloses a method in which a drift region is formed in a vertical direction to largely reduce the size of the drift region in the high-withstand voltage MOSFET. An element structure of the high-withstand voltage MOSFET will be described with reference to FIG. 7. As shown in FIG. 7, a gate electrode 102 is formed on a semiconductor substrate 100 through a gate insulation film 101, trenches 103 are formed in the semiconductor substrate 100 on both sides of the gate electrode 102, an electric field alleviation layer 104 (drift region) is provided on a trench sidewall on the side of the gate electrode 102, and source and drain regions 105 are formed on the semiconductor substrate 100 on the bottom side of the trench.
In addition, as a method for suppressing a short channel effect and reducing a transistor size in a lateral type MOSFET, various kinds of trench gate type MOSFET are proposed and one of them is disclosed in Japanese Unexamined Patent Publication No. 2002-343963. A manufacturing method of the above trench gate type MOSFET will be described with reference to FIG. 8.
An element isolation region 111 is formed on a semiconductor substrate 110 (refer to FIG. 8A) and then a source and drain region 112 is formed by impurity ion implantation (refer to FIG. 8B). Then, a CVD oxide film 113 is deposited and the CVD oxide film 113 of a channel region of a transistor is opened and at the same time, the Si layer of the source-drain region 112 is etched away to provide a first Si trench 114 (refer to FIG. 8C). Next, by using a combination of CVD (chemical vapor deposition) and anisotropic etching, a sidewall 115 is formed of an insulation film such as an oxide film on a side wall of the first trench and at the same time, a second Si trench 116 is formed (refer to FIG. 8D). Then, a gate oxide film 117 is grown on the bottom of the second Si trench 116 by thermal oxidation. Then, the first and second trenches 114 and 116 are filled with a gate electrode material such as polysilicon, whereby a gate electrode 118 is formed (refer to FIG. 8E).
According to the high-withstand voltage MOSFET disclosed in the Japanese Unexamined Patent Publication No. 06-151453, although the size of the drift region in the high-withstand voltage transistor can be smaller than the conventional one, a channel length to ensure the punch through withstand voltage cannot be reduced. In addition, since the trench part becomes very high stepped part, it is difficult to miniaturize the semiconductor device comprising both high-withstand voltage transistor and low-withstand voltage transistor as a whole.
Furthermore, according to the trench gate type MOSFET disclosed in the Japanese Unexamined Patent Publication No. 2002-343963, although there is an effect in reduction in size of a fine transistor having a low power supply voltage (<1.8 v), the above element structure cannot be applied as it is to the high-withstand voltage MOSFET (10 to 50 v) requiring the drift region for alleviating an electric field.